Clock Uncertainty is used to model various factors like Skew, Jitter, Crosstalk, IR Drop, etc that can affect the Arrival of Clock Edge. By specifying Clock Uncertainty we get a window for Clock Edge, In that specified window Clock Edge can come at any point.
Factors for Clock Uncertainty
Pre CTS(Clock Tree Synthesis) : Ideal Clock
Setup uncertainty
Jitter + Skew + Setup Margin
Hold Uncertainty
Skew + Hold Margin
For Hold Uncertainty Jitter will not impact Uncertainty because in Hold Analysis same Clock Edge is considered. As Hold Check is done on the same Clock Edge so Jitter will affect both Launch and Capture Flop in the same manner This is one of the reasons for less value of hold uncertainty as compared to setup uncertainty.
Setup – T(clk-q) + T(propagation delay) + T(setup) < T(period) + T(skew) – T(jitter)
Hold – T(clk-q) + T(propagation delay) > T(hold) + T(skew)
Post CTS(Clock Tree Synthesis) : Actual Clock
Setup uncertainty
Jitter + Setup Margin
Hold Uncertainty
Hold Margin
Skew is not considered after the CTS stage because the Actual Clock is present that tells the actual delay.
Setup – T(clk-q) + T(propagation delay) + T(setup) < T(period) – T(jitter)
Hold – T(clk-q) + T(propagation delay) > T(hold)
For Setup Analysis, Setup Uncertainty is subtracted from the Required Time.
For Hold Analysis, Hold Uncertainty is added to the Required Time.
So, from this blog, you can answer the below set of questions
- Q1) What is Clock Uncertainty?
- Q2) What are factors included in Clock Uncertainty before and after the CTS stage?
- Q3) How Setup and Hold Uncertainty are modeled?
