LED Interfacing with FPGA
From the previous blog, we already know about FPGA, like how it works, its structure, and its type. It means we already know the basic things about FPGA but let’s know some more facts about FPGA. FPGA Program FPGA programming uses an HDL to alter circuits based on the capabilities desired for the device. Because…
Introduction to FPGA & CPLD
In this blog, we will look at a subtopic known as Field Programmable Gate Arrays, or simply FPGA and CPLD. We will discuss the principle of Programmable Logic Devices (PLD) and several of their types. We will also look at the architecture of a typical FPGA device and CPLD and its benefits. Introduction FPGAs are…
MISR (Multiple input signature register)
In this blog, we will learn how to design MISR, or Multiple Input Signature Register, in Verilog, but first, we should understand what MISR is. So, let’s start a blog in a fresh and exciting way. In working in individual test (BIST) strategies, putting away all the circuit yields on a chip isn’t feasible, but…
Shift Unit Design
In today’s blog, we will learn to design a shift unit. But, because jumping right into the design process will not be interesting, let’s start with some shift unit basic knowledge. Arithmetic Logic Shift Unit The Arithmetic Logic Shift Unit (ALSU) is a component of a computer system’s Arithmetic Logic Unit (ALU). It is a…
Traffic Light Controller
This is an interesting blog and somehow unique as well, so we will discuss it now. We know about the traffic light controller,but let’s start with the beginning. The primary function of traffic control signals is to assign right-of-way at intersections where a continuous flow of cars on one lane would cause significant delay for…
Flipflops
We have studied lots of things related to Verilog, so let’s learn to design something new through Verilog. A flip-flop or latch is a bistable multivibrator that has two stable states and may be used to store state information. Signals provided to one or more control inputs can cause the circuit to change state, and…
Switch Level Modeling style
In my previous blog we already studied this, but let’s start with more energy and more explanation. Verilog has several constructs for modelling switch-level circuits. These components are used to characterise digital circuits at the MOS-transistor level. As Verilog supports transistor level modelling, designers use it these days since the complexity of circuits has forced…
Useful System Tasks
In this blog, we will go over the system tasks that can be used in Verilog for a variety of purposes. Time-consuming simulation features like @posedge and others can be found in tasks. Tasks, often known as procedures or subroutines, are used in all programming languages. A task must be explicitly spelled out using a…
User-Defined Primitives
This blog will start this new topic with a user-defined primitive, also known as UDP. As part of the language, Verilog includes a standard set of primitives such as and, nand, or, nor, and not. These are also referred to as built-in primitives. Designers, on the other hand, like to employ their custom-built primitives when…
Procedural Continuous Assignment
In the previous blog, Procedural Assignments, we looked at procedural assignments. So let’s start a new blog with more details about the study about procedural continuous assignment. Previously, we learned that a register is assigned a value via procedural assignments. The value remains in the register until another procedural assignment assigns another value to it….
