Inputs to Placement
Netlist/Verilog(.V)
The Logical Connectivity of all cells in design is required here in placement. So, the Netlist requirement is of higher priority.
Floorplan DEF(Design Exchange Format)
icc_shell> write_def —> will store database till Floorplan.
icc_shell> read_def when required.
The most requirement would be when there is a bad floorplan found in the future. To modify the floorplan one can directly load the DEF file and modify Floorplan. Instead of repeating the complete flow from the start (loading the input files and performing sanity checks ), which is time taking, one can load the data by writing DEF and reading it into a tool.
DEF is in a readable format.
Logical and Physical library
Logical Library: (Liberty/Library File: Lib)
- Holds functionality of standard cells and Soft Macros.
Soft Macro
Here circuit is not fixed. The type of gates used in the structure is known. Timing and Functionality information both are known.
Hard Macro
Here circuit is fixed. The type of gates used in the structure is not known. Only timing information is known but not functionality.
- Design rules like max_cap, max_trans, max_fanout are available.
- Timing-related information like Setup, Hold and Cell delay values are present.
- Pin names, Area, functionality, timing, power(internal and leakage power).
Physical Library:(Library Exchange Format:Lef)
- This represents the physical layout of IC(std.cells, macros, pads).
- Pin Information like the layer in which i/p and o/p pins are located along with their names.
- Height of placement row.
Technology file: TechFile
- Holds physical design rules of vias and layers(like wire-wire spacing, via-wire spacing, via-via spacing).
- Colour patterns of metals and vias in design.
Density Constraints
One can control the density of cells or placement density for a block in a specific region. To control cell density partial placement blockages can be used.
Output of Placement
Placement DEF
The complete stages done till placement will be in Placement DEF. Soon when placement database is needed, instead of loading all inputs and again performing every stage like Floorplan, Powerplan costs more time. So, better write the database in DEF which is a readable format and dump into tool when required.
icc_shell> write_def —> will store database till Placement.
icc_shell> read_def can read the database/design into tool till placement when required.
